HLS IP核m_axi接口直接与DDR交互数据

大体步骤同之前写的差不多

https://blog.csdn.net/qq_40268672/article/details/104620907 我的板子型号是xc7z010-clg400-1,可以从xparameters.h头文件中看到，DDR的起始地址为 一共511M，至于为什么少了1M也不清楚，可能有专门的用途，留待以后研究。

CPU端代码

```c
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/*
 * helloworld.c: simple test application
 *
 * This application configures UART 16550 to baud rate 9600.
 * PS7 UART (Zynq) is not initialized by this application, since
 * bootrom/bsp configures it to baud rate 115200
 *
 * ------------------------------------------------
 * | UART TYPE   BAUD RATE                        |
 * ------------------------------------------------
 *   uartns550   9600
 *   uartlite    Configurable only in HW design
 *   ps7_uart    115200 (configured by bootrom/bsp)
 */

#include 
#include
#include "platform.h"
#include "xil_printf.h"
#include "xmem_test_hw.h"
#include "xmem_test.h"
int main()
{
    init_platform();
    Xil_DCacheDisable();
    int i;
    for(i=0;i