Vivado FFT IP核学习

FFT IP核配置

1.点击ip catalog，输入FFT，选择FFT IP核，打开如下界面进行配置 : 2.点击implementation，进行如下配置 3.点击detailed implementation，可进一步配置

4.查看配置完的情况 以及

IP核例化

编写如下代码

`timescale 1ns / 1ps
//
// Company: 
// Engineer: 
// 
// Create Date: 2021/07/30 13:01:15
// Design Name: 
// Module Name: fft_top
// Project Name: 
// Target Devices: 
// Tool Versions: 
// Description: 
// 
// Dependencies: 
// 
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
// 
//


module fft_top(
input logic aclk,
input logic aresetn,
//input data
input logic [31:0] s_axis_data_tdata,                      // input wire [31 : 0] s_axis_data_tdata
input logic s_axis_data_tvalid,                    // input wire s_axis_data_tvalid
output logic s_axis_data_tready,                    // output wire s_axis_data_tready
input logic s_axis_data_tlast,                      // input wire s_axis_data_tlast
//output result
output logic [47:0] m_axis_data_tdata,                      // output wire [47 : 0] m_axis_data_tdat
output logic [7:0] m_axis_data_tuser,                      // output wire [7 : 0] m_axis_data_tuser
output logic m_axis_data_tvalid,                    // output wire m_axis_data_tvalid
input logic m_axis_data_tready,                    // input wire m_axis_data_tready
output logic m_axis_data_tlast                      // output wire m_axis_data_tlast
    );

xfft_0 U (
  .aclk(aclk),                                                // input wire aclk
  .aresetn(aresetn),                                          // input wire aresetn
  .s_axis_config_tdata(8'd1),                                // input wire [7 : 0] s_axis_config_tdata
  .s_axis_config_tvalid(1'b1),                               // input wire s_axis_config_tvalid
  .s_axis_config_tready(),                                   // output wire s_axis_config_tready
  .s_axis_data_tdata(s_axis_data_tdata),                      // input wire [31 : 0] s_axis_data_tdata
  .s_axis_data_tvalid(s_axis_data_tvalid),                    // input wire s_axis_data_tvalid
  .s_axis_data_tready(s_axis_data_tready),                    // output wire s_axis_data_tready
  .s_axis_data_tlast(s_axis_data_tlast),                      // input wire s_axis_data_tlast
  .m_axis_data_tdata(m_axis_data_tdata),                      // output wire [47 : 0] m_axis_data_tdata
  .m_axis_data_tuser(m_axis_data_tuser),                      // output wire [7 : 0] m_axis_data_tuser
  .m_axis_data_tvalid(m_axis_data_tvalid),                    // output wire m_axis_data_tvalid
  .m_axis_data_tready(1'b1),                    // input wire m_axis_data_tready
  .m_axis_data_tlast(m_axis_data_tlast),                      // output wire m_axis_data_tlast
  .event_frame_started(),                  // output wire event_frame_started
  .event_tlast_unexpected(),            // output wire event_tlast_unexpected
  .event_tlast_missing(),                  // output wire event_tlast_missing
  .event_status_channel_halt(),      // output wire event_status_channel_halt
  .event_data_in_channel_halt(),    // output wire event_data_in_channel_halt
  .event_data_out_channel_halt()  // output wire event_data_out_channel_halt
);
endmodule

因为我们实现正向FFT，所以config_data设为1

编写测试平台进行仿真测试

`timescale 1ns / 1ps
//
// Company: 
// Engineer: 
// 
// Create Date: 2021/07/30 13:22:53
// Design Name: 
// Module Name: fft_tb
// Project Name: 
// Target Devices: 
// Tool Versions: 
// Description: 
// 
// Dependencies: 
// 
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
// 
//


module fft_tb;
parameter N = 16;
logic aclk;
logic aresetn;
//
logic [31:0] data_in;
logic valid_in;
logic last_in;
logic ready_in;
//
logic [47:0] data_out;
logic valid_out;
logic last_out;
logic ready_out;
//
logic [31:0] data[N];
logic [31:0] count;
logic start;
logic [20:0] out_real;
logic [20:0] out_imag;
//start
initial begin
    start=0;
    #110
    start=1;
    #10
    start=0;
end
//
initial begin
    for(int i=0;i