单比特跨时钟域--握手

代码

握手代码

`timescale 1ns / 1ps
//
// Company: 
// Engineer: 
// 
// Create Date: 2022/06/15 21:01:15
// Design Name: 
// Module Name: gcd
// Project Name: 
// Target Devices: 
// Tool Versions: 
// Description: 
// 
// Dependencies: 
// 
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
// 
//
	
module send(
    input logic clka,
	input logic clkb,
    input logic rst,
    input logic start,
	output logic done
);

logic req;
logic req_sync_d1;
logic req_sync_d2;
logic req_sync_d3;
logic data;
logic ack;
logic ack_sync_d1;
logic ack_sync_d2;
logic ack_sync_d3;
//req
always@(posedge clka,posedge rst)
if(rst)
   req