uint32_t am_hal_gpio_pinconfig(uint32_t ui32Pin, am_hal_gpio_pincfg_t bfGpioCfg)
- 参数uint32_t ui32Pin为引脚号
- 参数am_hal_gpio_pincfg_t bfGpioCfg为引脚相关配置信息
typedef struct
{
uint32_t uFuncSel : 3; // [2:0] Function select (FUNCSEL)
uint32_t ePowerSw : 2; // [4:3] Pin is a power switch source (VCC) or sink (VSS)
uint32_t ePullup : 3; // [7:5] Pin will enable a pullup resistor
uint32_t eDriveStrength : 2; // [9:8] Pad strength designator
uint32_t eGPOutcfg : 2; // [11:10] OUTCFG (GPIO config only)
uint32_t eGPInput : 1; // [12:12] GPIO Input (GPIO config only)
uint32_t eIntDir : 2; // [14:13] Interrupt direction
uint32_t eGPRdZero : 1; // [15:15] GPIO read as zero
//
// The following descriptors designate the chip enable features of the
// pin being configured. If not a CE, these descriptors are ignored.
// uIOMnum is 0-5 for the IOMs, or 0-2 for MSPI.
//
uint32_t bIomMSPIn : 1; // [16:16] 1 if CE is IOM, 0 if MSPI
uint32_t uIOMnum : 3; // [19:17] IOM number (0-5) or MSPI (0-2)
uint32_t uNCE : 2; // [21:20] NCE number (0-3).
uint32_t eCEpol : 1; // [22:22] NCE polarity.
uint32_t uRsvd23 : 9; // [31:23]
} am_hal_gpio_pincfg_t;
uFuncSel
This is a value from 0-7 which will usually come from am_hal_pin.h.
ePullupMany pads can supply a pullup resistor. For those that do, this member defines the value of that pullup. It is one of the following enumerations:
typedef enum
{
//
//! Define pullup enums.
//! The 1.5K - 24K pullup values are valid for select I2C enabled pads.
//! For Apollo3 these pins are 0-1,5-6,8-9,25,27,39-40,42-43,48-49.
//! The "weak" value is used for almost every other pad except pin 20.
//
AM_HAL_GPIO_PIN_PULLUP_NONE = 0x00,
AM_HAL_GPIO_PIN_PULLUP_WEAK,
AM_HAL_GPIO_PIN_PULLUP_1_5K,
AM_HAL_GPIO_PIN_PULLUP_6K,
AM_HAL_GPIO_PIN_PULLUP_12K,
AM_HAL_GPIO_PIN_PULLUP_24K,
AM_HAL_GPIO_PIN_PULLDOWN
} am_hal_gpio_pullup_e;
eGPOutcfg
This member is generally used when defining a pad as a GPIO output and defines the output type. It is one of the following enumerations:
//!
//! OUTCFG pad configuration: am_hal_gpio_pincfg_t.eGPOutcfg enums
//! Applies only to GPIO configured pins.
//! Ultimately maps to GPIOCFG.OUTCFG, bits [2:1].
//!
typedef enum
{
AM_HAL_GPIO_PIN_OUTCFG_DISABLE = 0x0,
AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL = 0x1,
AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN = 0x2,
AM_HAL_GPIO_PIN_OUTCFG_TRISTATE = 0x3
} am_hal_gpio_outcfg_e;
eDriveStrength
For output configurations, many pads can be configured with various drive strengths. For those that do, this member defines that and will be one of the following enumerations:
//!
//! Pad Drive Strength configuration: am_hal_gpio_pincfg_t.eDriveStrength enums
//!
typedef enum
{
//
//! DRIVESTRENGTH is a 2-bit field.
//! bit0 maps to bit2 of a PADREG field.
//! bit1 maps to bit0 of an ALTPADCFG field.
//
AM_HAL_GPIO_PIN_DRIVESTRENGTH_2MA = 0x0,
AM_HAL_GPIO_PIN_DRIVESTRENGTH_4MA = 0x1,
AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA = 0x2,
AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA = 0x3
} am_hal_gpio_drivestrength_e;
eGPInput
This member is generally used when defining a pad as a GPIO input and defines the input type. It is one of the following enumerations:
//!
//! GPIO input configuration: am_hal_gpio_pincfg_t.eGPInput enums
//! Applies only to GPIO configured pins!
//! Ultimately maps to PADREG.INPEN, bit1.
//!
typedef enum
{
AM_HAL_GPIO_PIN_INPUT_AUTO = 0x0,
AM_HAL_GPIO_PIN_INPUT_NONE = 0x0,
AM_HAL_GPIO_PIN_INPUT_ENABLE = 0x1
} am_hal_gpio_input_e;
eGPRdZero
This member is generally used when defining a pad as a GPIO input and defines whether the pin value can be read or if it always reads as zero. It is one of the following enumerations:
//!
//! am_hal_gpio_pincfg_t.eGPRdZero
//! For GPIO configurations (funcsel=3), the pin value can be read or 0 can be
//! forced as the read value.
//!
typedef enum
{
AM_HAL_GPIO_PIN_RDZERO_READPIN = 0x0,
AM_HAL_GPIO_PIN_RDZERO_ZERO = 0x1
} am_hal_gpio_readen_e;
eIntDir
This member is used when interrupts are to be enabled for a pad. It is one of the following enumerations
//!
//! GPIO interrupt direction configuration: am_hal_gpio_pincfg_t.eIntDir enums
//! Note: Setting INTDIR_NONE has the side-effect of disabling being able to
//! read a pin - the pin will always read back as 0.
//!
typedef enum
{
// Bit1 of these values maps to GPIOCFG.INCFG (b0).
// Bit0 of these values maps to GPIOCFG.INTD (b3).
AM_HAL_GPIO_PIN_INTDIR_LO2HI = 0x0,
AM_HAL_GPIO_PIN_INTDIR_HI2LO = 0x1,
AM_HAL_GPIO_PIN_INTDIR_NONE = 0x2,
AM_HAL_GPIO_PIN_INTDIR_BOTH = 0x3
} am_hal_gpio_intdir_e;
ePowerSw
A select number of pins can be configured to source or sink current (see datasheet for which pins support these functions). For pins that support it, it is one of the following enumerations:
//*****************************************************************************
//!
//! Types for ui32GpioCfg bitfields in am_hal_gpio_pinconfig().
//!
//*****************************************************************************
//!
//! Power Switch configuration: am_hal_gpio_pincfg_t.ePowerSw enums
//!
typedef enum
{
AM_HAL_GPIO_PIN_POWERSW_NONE,
AM_HAL_GPIO_PIN_POWERSW_VDD,
AM_HAL_GPIO_PIN_POWERSW_VSS,
AM_HAL_GPIO_PIN_POWERSW_INVALID,
} am_hal_gpio_powersw_e;
uIOMnum
This member is used when a pad is defined to be a chip enable and designates the IO Master number (0-5) or MSPI (6) that the CE is to be used for. Most pads can be configured as a chip enable with each pad supporting 4 combinations of IOM/MSPI and channel numbers. See the datasheet for a table of these combinations. This member is always a value of 0-5 or 6.
uNCEThis member is used when a pad is defined to be a chip enable and is used in conjunction with uIOMnum to define the CE number for a particular SPI device. It is always a value of 0-3.
eCEpolThis member is used when a pad is defined to be a chip enable and specifies the polarity of the CE enable. It is one of the following enumerations:
//!
//! nCE polarity configuration: am_hal_gpio_pincfg_t.eCEpol enums
//!
typedef enum
{
AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW = 0x0,
AM_HAL_GPIO_PIN_CEPOL_ACTIVEHIGH = 0x1
} am_hal_gpio_cepol_e;
bIomMSPIn
1 if CE is IOM, 0 if MSPI
uRsvd23[31:23]保留位
- 写GPIO值
uint32_t am_hal_gpio_state_write(uint32_t ui32Pin, am_hal_gpio_write_type_e eWriteType)
- 参数uint32_t ui32Pin为引脚号
- 参数am_hal_gpio_write_type_e eWriteType为操作控制类型
//*****************************************************************************
//!
//! Write types for am_hal_gpio_state_write().
//!
//*****************************************************************************
typedef enum
{
AM_HAL_GPIO_OUTPUT_CLEAR,
AM_HAL_GPIO_OUTPUT_SET,
AM_HAL_GPIO_OUTPUT_TOGGLE,
AM_HAL_GPIO_OUTPUT_TRISTATE_DISABLE,
AM_HAL_GPIO_OUTPUT_TRISTATE_ENABLE,
AM_HAL_GPIO_OUTPUT_TRISTATE_TOGGLE
} am_hal_gpio_write_type_e;
- 以GPIO 10为例输出高低电平
am_hal_gpio_pincfg_t g_pin10_gpio =
{
.uFuncSel = AM_HAL_PIN_10_GPIO,
.ePullup = AM_HAL_GPIO_PIN_PULLUP_NONE,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL,
};
am_hal_gpio_pinconfig(10,g_pin10_gpio);
for(uint8_t i=0; iU.Msk_b.b16)
{
if(am_hal_gpio_input_read(16))
{
am_util_stdio_printf("GPIO interrupt = 1 \n");
}
else
{
am_util_stdio_printf("GPIO interrupt = 0 \n");
}
}
}
3.注册的回调函数
static void io16_int_handler(void)
{
am_util_stdio_printf("hostint_handler \n");
}
am_hal_gpio_interrupt_service函数和am_hal_gpio_interrupt_register函数是配套使用的,如果没有调用am_hal_gpio_interrupt_register注册回调,则可以不需要使用 am_hal_gpio_interrupt_service函数进行回调
4.AM_HAL_GPIO_MASKCREATE宏定义
//!
//! The following macros ensure forward compatibility with future SDK releases.
//! They should be used, in lieu of AM_HAL_GPIO_BIT(), when creating bitmasks
//! for GPIO interrupts.
//! AM_HAL_GPIO_MASKCREATE()
//! AM_HAL_GPIO_MASKBIT()
//!
#define AM_HAL_GPIO_MASKCREATE(sMaskNm) \
am_hal_gpio_mask_t sMaskNm; \
am_hal_gpio_mask_t *p##sMaskNm = &sMaskNm; \
sMaskNm.U.Msk[0] = sMaskNm.U.Msk[1] = sMaskNm.U.Msk[2] = 0;
5.AM_HAL_GPIO_MASKBIT函数
static inline am_hal_gpio_mask_t* AM_HAL_GPIO_MASKBIT(am_hal_gpio_mask_t*psMaskNm, uint32_t n)
{
psMaskNm->U.Msk[n / 32] = (1
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